Implementation of High Speed Pipelined Distributed Arithmetic Based FIR Filter
نویسندگان
چکیده
منابع مشابه
Implementation of High Speed Pipelined Distributed Arithmetic Based FIR Filter
In the explosive growth of wireless and networking applications, Digital Signal Processing (DSP) operations are extensively used for characterizing and controlling the discrete input signals. For those DSP operations, Finite Impulse Response (FIR) filter is used to filter the unwanted/noise/distorted signals from the discrete input signals. In this study, design of Pipelined Distributed Arithme...
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In this paper, high speed and area efficient multiplier-less architecture for Finite impulse response filter (FIR) based on distributed arithmetic is presented. The proposed Lookup table less architecture for FIR filter uses the speed advantage of Carry save adder. A modification in the shift accumulator stage yields both high speed and area savings. Furthermore, Memory reduction is possible si...
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Abstract:The VLSI design industry has grown rapidly during the last few decades. The complexity of the applications increases day by day due to which the area utilization increases. The tradeoff between area and speed is an important factor. The main focus of continued research has been to increase the operating speed by keeping the area and memory utilization of the design as low as possible. ...
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This paper proposes to optimize the system speed with minimal cost and hardware by making use of pipelining approach in the designing of FIR filter. The nonpipelined and pipelined FIR filter has been designed using Hardware Description Language (HDL) and a comparative study of both the filter designs using Radix-4 & Radix-8 has been done. The design synthesis and power analysis are carried out ...
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ژورنال
عنوان ژورنال: Research Journal of Applied Sciences, Engineering and Technology
سال: 2015
ISSN: 2040-7459,2040-7467
DOI: 10.19026/rjaset.11.2247